To recover bricked device perform procedure, described in How to Update Firmware and FPGA Images for the NI 292x and N2xx USRP article, before power cycling USRP.Īdditional Information This article only covers the Digilent ADEPT workflow.
Note: Written FPGA Image will take effect only till power cycling USRP RIO. Default FPGA images directory for Windows: C:\Program Files (x86)\National Instruments\NI-USRP\imagesĬheck with FPGA Image Flavors description to choose appropriate one Note: If you want to recover bricked USRP RIO device you should use one of default images provided with NI-USRP driver. Configuration Onboard JTAG configuration circuitry to enable configuration over USB. The HS3 attaches to target boards using Xilinx’s x, mm programming header. button to open navigation window to define FPGA image location. struct xspiplatformdata - Platform data of the Xilinx SPI driver. fully compatible will all Xilinx Tools, and can be seamlessly driven from iMPAT, hipScope, EDK, and Vivado. Digilent Programming Cable JTAG-HS3 410-299. Adept Utility should recognize your device as Dsp 1: I think Rudi needs to use Xilinx USB cable with XILINX tools > not with 3rd party XXX or 3rd party FX2.Install then open Digilent ADEPT utility.Follow steps below to write/recover an FPGA image to USRP RIO device through a JTAG connector:
